1. Field of Invention
The present invention relates to a manufacture method of forming semiconductor device. More particularly, the present invention relates to a manufacture method of forming semiconductor device with improved characteristics.
2. Description of Related Art
The metal-oxide-semiconductor (MOS) transistor is one of the most important devices widely applied for very-large-scale-integration (VLSI) circuits, including logic circuits, microprocessors and memories. In addition to a gate oxide layer and a conductive gate structure, the MOS transistor further includes a source/drain region having dopants with a conductivity type opposite to that of the substrate.
With the rapid developments of electronic products e.g. telecommunication products, operating speed of transistors is bound to increase. However, due to the limitations in mobility of electrons and holes in silicon, the applications of the transistors are confined.
The prior art has proposed using silicon germanium (SiGe) epitaxy material as a major component of the source/drain region of the transistor. As compared with silicon, germanium has larger atomic volume and applies lateral compressive stress toward the channel region. Thus, mobility of electrons and holes can be enhanced with the source/drain region formed by SiGe, and the device performance can be improved.
At present, selective epitaxy growth (SEG) process is commonly used to form a SiGe layer for the semiconductor manufacturing processes. However, certain issues still exist in the manufacturing processes involving using SEG process, which may downgrade the device performances.